The simulated output voltage ripple is shown in Figure 4a where the output voltage ripple is reduced to 2mV. Since the new capacitor has to be placed further away from the power module, the parasitic inductance involved with the new capacitors is 1nH. To further reduce the output voltage ripple, one additional 22♟ output capacitor is place at the output. The bypassing capacitor effectively reduces the output ripple to around 3mV at 5V input, 1.2V output, and 2A load.įigure 3: Output Voltage Ripple of MPM3833C with One 22♟ Output Capacitor Figure 3 illustrates the output ripple of the power module with one 22♟ capacitor. It is assumed that each additional output capacitor introduces an additional 0.5nH of parasitic inductance to the bypassing loop. To demonstrate the impact of loop parasitic inductance, an MPM3833C with various output capacitors issimulated using Simplis. Adding more output capacitance become less and less effective and eventually, the shunt loop is dominated by parasitic inductance.įigure 2: Typical PCB Layout for MPM3833C Power Module Consequently, more parasitic inductance is involved in the output capacitor that is further away from the power module. As shown, as more capacitors are placed on the output plane, the distance from the additional capacitor to the output pin of the power module increases. The output capacitors are placed along the output current path. In the PCB layout of the MPM3833C, a wide copper plane is used for the output power path to minimize power losses. Adding more output capacitors on a PCB would introduce additional parasitic inductance and AC resistance to the shunt path and thus reduce the effectiveness of bypassing the switching noise.Ī typical PCB layout of an MPS power module, which integrates optimized inductors to simplify the power converter design, is shown in Figure 2. Practically, the output capacitors are laterally placed on a PCB. Ideally, the noise shunt capability can be increased by paralleling more output capacitors. The minimum inductance of L is determined as: The inductance of L is designed to meet inductor current ripple requirement. In the subsequent development, it is assumed the buck converter operates under continuous conduction mode (CCM) for output voltage ripple minimization. The output capacitor reduces the output voltage ripple by providing a low impedance path for the high-frequency voltage components to return to ground.įigure 1: CCM Operation of Synchronous Buck Regulator The output capacitors (C OUT) is placed at the output to smooth the output voltage under steady state. The switching behavior of the buck regulator causes the output voltage to fluctuate. The energy stored in the inductor is transferred to the output capacitor and load when S2 is on and S1 is off, causing the inductor current to drop. During this period, the inductor current rises. The input source provides energy to the power inductor (L) and the load when S1 is turned on and S2 is turned off. Single-Stage Filter DesignĪ synchronous buck converter consists of an input capacitor C IN, two switches (S1 and S2) with their body diodes, an energy storage power inductor (L), and output capacitors (C OUT). For applications such as RF ADC and DAC applications where it is necessary to meet less than 1mV ripple, a second-stage LC filter should be used to effectively suppress the switching noise. The single-stage capacitive filter is sufficient for applications that requires no less than 1-2mV of output voltage ripple. Low ESR ceramic capacitors are utilized to meet output voltage ripple specifications. Single-stage capacitive filter is commonly used for DC/DC converter applications. This article illustrates the procedure of designing filtering to achieve ultra-low output voltage noise with SMPS regulators. Due to its switching nature, a SMPS emits noise at its switching frequency and its harmonics. Switched-mode power supplies (SMPS) have the advantage of high efficiency compared to traditional low-dropout (LDO) regulators. Passive Filter Design Concept of Buck Regulators for Ultra-Low Noise Applications Lattice Semiconductor Reference Designs.Switching Converters and Controllers AECQ Grade.BLDC Pre Drivers and Integrated Solutions.Digital Isolators with Integrated Power.Multi Phase Controllers & Intelli-Phase.
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